CMP60N03LD13 n-c hannel t rench m osfet 2004/03/04 preliminary rev. 0.1 champion microelectronic corporation page 1 application features buck converter high side switch other applications v dss r ds(on) typ. i d 30v 10.8m ? 55a low on resistance low gate charge peak current vs pulse width curve inductive switching curves improved uis ruggedness pin configuration symbol to-252 front view 1 23 gate drain source d s g n-channel mosfet absolute maximum ratings rating symbol value unit drain to source voltage (note 1) v dss 30 v drain to current ?e continuous tc = 25 j , v gs @10v (note 2) ?e continuous tc = 100 j , v gs @10v (note 2) ?e pulsed tc = 25 j , v gs @10v (note 3) i d i d i dm 50 fig.3 fig.6 a gate-to-source voltage ?e continue v gs 20 v total power dissipation derating factor above 25 j p d 52 0.5 w w/ j peak diode recovery dv/dt (note 4) dv/dt 3.0 v/ns operating junction and stor age temperature range t j , t stg -55 to 150 j single pulse avalanche energy l=1.1mh,i d =30 amps e as 500 mj maximum lead temperature for soldering purposes t l 300 j maximum package body for 10 seconds t pkg 260 j pulsed avalanche rating i as fig.8 thermal resistance symbol parameter min typ max units test conditions r jc junction-to-case 2.4 j /w water cooled heatsink, p d adjusted for a peak junction temperature of +150 j r ja junction-to-ambient (pcb mount) 50 j /w minimum pad area, 2-oz copper, fr-4 circuit board, double sided r ja junction-to-ambient 62 j /w 1 cubic foot chamber, free air
CMP60N03LD13 n-c hannel t rench m osfet 2004/03/04 preliminary rev. 0.1 champion microelectronic corporation page 2 ordering information part number package CMP60N03LD13 to-252 electrical characteristics unless otherwise specified, t j = 25 j . CMP60N03LD13 characteristic symbol min typ max units off characteristics drain-to-source breakdown voltage (v gs = 0 v, i d = 250 g a) v dss 30 v breakdown voltage temperature coefficient,fig.11 (reference to 25 j , i d = 250 g a) g v dss / ? t j 27 mv/ j drain-to-source leakage current (v ds = 24 v, v gs = 0 v, t j = 25 j ) (v ds = 24 v, v gs = 0 v, t j = 125 j ) i dss 1 10 a gate-to-source forward leakage (v gs = 20 v) i gss 100 na gate-to-source reverse leakage (v gs = -20 v) i gss -100 na on characteristics gate threshold voltage,fig.12 (v ds = v gs , i d = 250 g a) v gs(th) 1.0 3.0 v static drain-to-source on-res istance, fig.9,10 (note 5) (v gs = 10 v, i d = 15a) (v gs = 4.5 v, i d = 12a) r ds(on) 10.8 15.4 12.5 m
forward transconductance (v ds = 15 v, i d = 12a) (note 5) g fs 28 s dynamic characteristics input capacitance c iss 1520 pf output capacitance c oss 314 pf reverse transfer capacitance (v ds = 15 v, v gs = 0 v, f = 1.0 mhz) fig.14 c rss 152 pf total gate charge (v gs = 10 v) q g 27.9 35 nc total gate charge (v gs = 4.5 v) q g 14 19 nc gate-to-source charge q gs 4.9 nc gate-to-drain charge (v ds = 15 v, i d = 12 a) (note 6) fig.15 q gd 4.3 nc resistive switching characteristics turn-on delay time t d(on) 10 ns rise time t r 3.4 ns turn-off delay time t d(off) 36 ns fall time (v dd = 15 v, i d = 12 a, v gs = 10 v, r g = 1.0
) (note 6) t f 6.0 ns turn-on delay time t d(on) 16 ns rise time t r 7.2 ns turn-off delay time t d(off) 34 ns fall time (v dd = 15 v, i d = 12 a, v gs = 4.5v, r g = 1.0
) (note 6) t f 14 ns source-drain diode characteristics continuous source current (body diode fig.16) i s 50 a pulse source current (body diode) integral pn-diode in mosfet i sm fig.6 a forward on-voltage (i s = 12 a, v gs = 0 v) v sd 1.0 v forward turn-on time t rr 25 38 ns reverse recovery charge (i f = 12 a, v gs = 0 v, d i /d t = 100a/s) q rr 31 46 nc
CMP60N03LD13 n-c hannel t rench m osfet 2004/03/04 preliminary rev. 0.1 champion microelectronic corporation page 3 note 1: t j = +25 j to 150 j note 2: current is calculated based upon maximum allowable junction temperature. package current limitation is 30a. note 3: repetitive rating; pulse width limited by maximum junction temperature. note 4: i sd = 12.0a, di/dt ? 100a/s, v dd ? bv dss , t j = +150 j note 5: pulse width ? 250s; duty cycle ? 2% note 6: essentially independe nt of operating temerpature. package dimension to-252 123 4 l e c a v j u h d r b s k g pin 1: gate pin 2: drain pin 3: source
t p , rectangular pulse duration (seconds) t c , case temperature ( o c ) figure 3. maximum continuous drain current vs case temperature p d , power dissipation ( w ) t c , case temperature ( o c ) v ds , drain-to-source voltage ( v ) 40 50 i d , drain current (a) i d , drain current (a) r ds(on) , drain-to-source on resistance ( ?) v gs , gate-to-source voltage ( v ) figure 4. typical output characteristics figure 5. typical drain- to-source on resistance vs gate voltage and drain current 25 20 15 10 5 0 60 30 50 20 10 40 1.00 0.10 0.01 0 30 20 10 0 figure 2. maximum power dissipation vs case temperature 05 10 15 20 6 7 8 9 10 25 50 75 100 125 150 25 50 75 100 125 150 1e-05 1e-04 1e-03 1e-02 1e-01 1e+00 1e+01 30 60 0.10 notes: duty factor: d=t1/t2 peak t j =p dm x z jc x r jc +t c 20% 10% 5% 2% single pulse 1% p dm t 1 t 2 v g s = 4 . 5 v v gs = 3.7v pulse duration = 250 s duty cycle = 0.5% max t c = 25 o c figure 1. maximum effective therm al impedance, junction-to-case 90 80 70 v gs = 2.7v v gs = 3.3v v g s = 4 . 0 v v g s = 1 0 v v gs = 3.0v v gs = 2.5v v g s = 3 . 5 v 100 50% duty cycle 0.09 0.08 0.07 0.06 0.05 0.04 0.03 0.02 0.01 0.00 4 3 2 i d = 7a i d = 14 a i d = 28 a i d = 5 5 a 5 z jc , thermal impedance pulse duration = 250 s duty cycle = 0.5% max t c = 25 o c 35 2004/03 /04 preliminary rev. 0.1 champion microelectronic corporation page 4 CMP60N03LD13 n-c hannel t rench m osfet
figure 6. maximum peak current capability figure 10. typical drain-to-source on resistance vs junction temperature figure 9. typical drain-to-source on resistance vs drain current t p , pulse width (seconds) i dm , peak current (a) 10000 100 1 v gs , gate-to-source voltage ( v ) i d , drain-to-source current (a) t av , time in avalanche (seconds) i as , avalanche current (a) 1000 100 10 1 i d , drain current (a) 10 t j , junction temperature ( o c ) r ds(on) , drain-to-source resistance (normalized) 1.2 1.1 1.0 0.9 0.7 0.8 r ds(on) , drain-to-source on resistance (m : ) 25 30 20 15 10 5 0 figure 7. typical transfer characteristics figure 8. unclamped inductive switching capability 1e-6 1e-3 10e-3 100e-3 10e-6 100e-6 -75 -50 -25 0 25 50 75 100 125 150 0 50 100 150 200 250 1.0 1.5 2.0 2.5 3.0 3.5 1e-6 10e-6 100e-6 1e-3 10e-3 100e-3 1e+0 10e+0 100 300 350 400 transconductance may limit current in this region for temperatures above 25 o c derate peak current as follows: ii 25 150 t c ? 125 ---------------------- = pulse duration = 250 s duty cycle = 0.5% max vds = 15 v +150 o c +25 o c -55 o c starting t j = 25 o c starting t j = 150 o c v gs = 10 v pulse duration = 250 s duty cycle = 0.5% max v gs = 10v, i d = 15a 1000 4.0 v gs = 4.5v 1.5 1.4 1.3 1.6 pulse duration = 10 s duty cycle = 0.5% max tc=25c if r z 0: t av = (l/r) ln[i as r)/(1.3bv dss -v dd )+1] if r= 0: t av = (li as )/(1.3bv dss -v dd ) r equals total series resistance of drain circuit 10 v gs = 10v 2004/ 0 3 /04 preliminary rev. 0.1 champi o n micr o e lec t ron i c c o rp o r ation page 5 CMP60N03LD13 n-c hannel t re nch m osfet
figure 13. maximum forward bias safe operating area area figure 11. typical breakdown voltage vs junction temperature figure 12. typical threshold voltage vs junction temperature figure 15. typical gate charge vs gate-to-source voltage figure 16. typical body diode transfer characteristics i dr , reverse drain current (a) v gs , gate-to-source voltage (v) c, capacitance (pf) i d , drain current (a) v gs(th) , threshold voltage (normalized) bv dss , drain-to-source breakdown voltage (normalized) t j , junction temperature ( o c) v ds , drain-to-source voltage (v) v ds , drain voltage (v) v sd , source-to-drain voltage (v) q g , total gate charge (nc) t j , junction temperature ( o c) 1.1 1.2 1.0 0.8 0.6 10000 180 80 100 10 1 12 8 2 0 1.10 1.05 1.00 0.95 0.90 0.9 0.7 1000 100 -75 -50 -25 0.0 25 50 75 100 125 150 -75 -50 -25 50 100 75 125 150 250.0 1 10 100 0.01 0.1 1 10 100 282624 8 0 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2220 1816 141210 642 4 6 10 v gs = 0v i d = 250 a v gs = v ds , i d = 250 a t j = max rated, t c = 25 o c single pulse operation in this area may be limited by r ds(on) 1 0 s 1 0 0 s 1 . 0 m s 1 0 m s d c c oss c rss c iss v gs = 0v, f = 1mhz c iss = c gs + c gd c rss = c gd c oss # c ds + c gd v ds = 15v i d = 12a v gs = 0v 1 5 0 o c 2 5 o c - 5 5 o c figure 14. typical capacitance vs drain-to-source voltage 0.5 1000 30 160 140 120 100 60 40 20 0 2004/ 0 3 /04 preliminary rev. 0.1 champi o n micr o elec t ron i c c o rp o r ation page 6 CMP60N03LD13 n-c hannel t re nch m osfet
CMP60N03LD13 n-c hannel t rench m osfet 2004/03 /04 preliminary rev. 0.1 champion microelectronic corporation page 7 important notice champion microelectronic corporation (cmc) reserves the right to make changes to its products or to discontinue any integrated circuit product or service without notice, and advises its cust omers to obtain the latest version of relevant inform ation to verify, before placing orders, that the information being relied on is current. a few applications using integrated circuit products may involv e potential risks of death, personal injury, or severe property or environmental damage. cmc integrated ci rcuit products are not designed, intended, authorized, or warranted to be suitable for use in life-support applications, devices or systems or other critical applications. us e of cmc products in such applications is understood to be fully at the risk of the cust omer. in order to minimize risks associated with the customer?s applications, th e customer should provide adequate design and operating safeguards. hsinchu headquarter sales & marketing 5f-1, no. 11, park avenue ii, science-based industrial park, hsinchu city, taiwan 11f, no. 306-3, sec. 1, ta tung road, hsichih, taipei hsien 221, taiwan t e l : +886-3-567 9979 t e l : +886-2-8692 1591 f a x : +886-3-567 9909 f a x : +886-2-8692 1596
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